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Encoding techniques for achieving reduction of power dissipation and delay by reducing BIT transitions and crosstalk on the buses for low power VLSI: thesis / M Shankaranarayana Bhat

Material type: Text

TextPublisher: Mangalagangothri: Mangalore University, 2018Description: v, 129p.; 29.5 cmSubject(s): Physics - thesis | Integrated circuits - thesis |DDC classification: PHD 621.3815

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Item type	Current location	Call number	Status	Date due	Barcode
Thesis	Mangalore University Library Reference	PHD 621.3815 P18/BHA (Browse shelf)	Available		D1365

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