Chip design for submicron VLSI:CMOS layout and simulation
By: Uyemura John P
Material type:
TextPublisher: Australia Thomson 2006Description: xvi411p.;24.5cmISBN: 81-315-0195-7Subject(s): Design of integrated circuits
| Item type | Current location | Call number | Status | Date due | Barcode |
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Mangalore University Library | 621.395 UYE (Browse shelf) | Checked out to Naveen Kumar S K (A36) | 05/03/2014 | 125804 |
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| 621.395 SIN Digital VLSI design | 621.395 TAU N Fundamentals of modern VLSI devices | 621.395 TAU N;1 Fundamentals of modern VLSI devices | 621.395 UYE Chip design for submicron VLSI:CMOS layout and simulation | 621.395 WAK Digital design : Principles and practices | 621.395 WAK Digital design : Principles and practices | 621.395 WAK;1 Digital design : Principles and practices |
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